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Microchip and Acacia Collaborate to Enable Optimized Terabit-Scale Data Center Interconnect Systems
The companies enable an interoperable coherent optics ecosystem that can help streamline the development of data center interconnect and metro transport systems.

The latest data center architectures and increased traffic are driving higher bandwidth requirements between data centers. To address this challenge, system developers must streamline the development of a new generation of 1.2 Tbps (1.2T) transport solutions across a wide range of client configurations. This requires that today’s terabit-scale Ethernet PHY devices and coherent optical modules interoperate with each other in Data Center Interconnect (DCI) and metro transport networks. Microchip Technology (Nasdaq: MCHP) today announces that it has worked with Acacia to demonstrate the fourth generation of interoperability between Microchip’s META-DX2 Ethernet PHY family and Acacia’s Coherent Interconnect Module 8 (CIM 8).

The two companies’ interoperable devices enable low-power, bandwidth-optimized, scalable solutions for pluggable optics in DCI and transport networks. They deliver three key benefits as they jointly enable high-capacity, multi-rate muxponders for optical transport platforms:

  • Optimized DCI bandwidth: The META-DX2 family, through its META-DX2+ PHY, uses its unique Lambda Splitting feature to split 400 GbE or 800 GbE clients across multiple wavelengths driven by the CIM8 modules. This maximizes the capacity between data centers in rate configurations such as 3x800 GbE over 2x1.2 Tbps waves or 5x400 GbE over 2x1.0 Tbps waves.
  • Reduced design risk: Microchip and Acacia have jointly verified successful SerDes interoperation at up to 112G per lane for Ethernet and OTN clients, which reduces design validation and system qualification requirements.
  • Better support for full bandwidth, multi-rate operation: The META-DX2+ crosspoint and gearbox functions enable 100 GbE to 800 GbE client modules to connect with full bandwidth to CIM8 modules.

“This interoperability extends a long-established partnership with Acacia to help accelerate and optimize the build-out of cloud computing and AI-ready optical networks while reducing development risk for our customers,” said Maher Fahmi, vice president for Microchip’s communications business unit. “Our META-DX2 is the first solution of its kind to integrate 1.6T of encryption, port aggregation and Lambda Splitting into the most compact 112G PAM4 device in the market.”

“With Acacia’s CIM 8 coherent modules verified to interoperate with Microchip’s META-DX2 devices, we see this as a robust solution that reduces system time-to-market,” said Markus Weber, senior director DSP product line management of Acacia. “The compact size and power efficiency of our CIM 8 coherent modules were designed to help network operators deploy and scale capacity of high-bandwidth DWDM connectivity between data centers and throughout transport networks.”

2024091501 / 15.09.2024 / Various / Microchip Technology Inc. /

Microchip Technology Adds ECC20x and SHA10x Families of Secure Authentication ICs to TrustFLEX Platform
Pre-Configured CryptoAuthentication™ ICs help reduce development time and minimize design costs

Microchip and Acacia Collaborate to Enable Optimized Terabit-Scale Data Center Interconnect Systems
The companies enable an interoperable coherent optics ecosystem that can help streamline the development of data center interconnect and metro transport systems.

Pick Your Power with Microchip’s New Electric Vehicle Charger Reference Designs
Flexible and scalable EV charger reference designs are designed to meet unique regional requirements

Microchip Introduces High-Performance PCIe® Gen 5 SSD Controller Family
Flashtec® NVMe® 5016 controllers are optimized to manage growing enterprise and data center workloads

Microchip Technology Introduces a New Core in the dsPIC® Digital Signal Controller Family to Enhance Precision and Execution of Real-Time Control

Microchip Technology Expands Processing Portfolio to Include Multi-Core 64-bit Microprocessors
PIC64GX MPU is the first of several product lines planned for Microchip’s PIC64 portfolio

Microchip Unveils Industry’s Highest Performance 64-bit HPSC Microprocessor (MPU) Family for a New Era of Autonomous Space Computing
New technology ecosystem is also launched as Microchip collaborates with over a dozen system and software partners to accelerate PIC64-HPSC adoption

Early Access to MPLAB® Extensions for VS Code® Provides Designers with the Ability to Utilize Microchip’s Development Tools Inside of the Popular IDE
Extensions are the company’s first steps in a longer-term plan to expand its portfolio and better serve developers working within the VS Code ecosystem

Microchip Adds Military-Standard Enhanced Low Dose Radiation Sensitivity (ELDRS) Qualification to Its Portfolio of Small-Signal Bipolar Junction Transistors to Ensure High Reliability for Critical Applications

Introducing the TimeProvider® XT Extension System for Migrating to a Modern Synchronization and Timing Systems Architecture
Accessory device to Microchip’s TimeProvider 4100 grandmaster scales up to 200 fully redundant T1, E1 or CC synchronization outputs

Microchip Adds 12 Products to its Wireless Portfolio to Further Reduce Barriers to Bluetooth® Integration for Designers at Every Skill Level
Company’s portfolio additions join the only Bluetooth Low Energy offering of its kind spanning modules, System-on-Chip (SoC) products and plug-and-play options

TimeProvider® 4100 Grandmaster Version 2.4 Firmware Offers Embedded BlueSky™ Firewall Technology to Detect Security Threats
Adds IEEE® 1588 standard profiles to meet power and 5G private network synchronization requirements

Company of the week

Cambridge GaN Devices

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